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Showing posts with label Virtual IP Environment. Show all posts
Showing posts with label Virtual IP Environment. Show all posts

Sunday, December 6, 2009

Vipers : Virtual IP Environment for Rapid Silicon

VIPERS aims to develop new solutions for RF based embedded systems for control applications. These are based on two developments: a set of ASIC macrocells for RF links and related functions and a novel virtual prototyping environment that supports rapid design and IP reuse. These developments are driven by user needs underpinned by two application prototype developments in the home automation area.

Developers need to develop two RF receiver and transceiver macrocells that cover both the 433 and 868 MHz ISM bands. These will be suitable for control applications as exemplified by home automation. They will be capable of supporting control-cost, oriented communications protocol. These macrocells will be key elements of low-cost, long range and low power embedded applications. They will be supported by an additional IP development for protocol and encryption functions.

The VIPERS workplan is divided into five workpackages. The horizontal workpackage project management and coordination (WP1) will support, guide and monitor the project plan against the objectives. The research oriented workpackages (WP2: Modelling and design tool and WP3: Hardware and Software IP design) are tightly linked to the application prototype development (WP4), through the provision of requirements and tools in a bi-directional relationship. Workpackage 5 is a common activity for exploitation and dissemination activities, including the management of the Intellectual Property generated within the project.